The size of semiconductor integrated circuits (also referred to herein as "die" or "chips") continuously decreases, resulting in demand for interconnect and packaging technologies that accommodate the increasingly high interconnect densities. Anticipated interconnect densities that will be employed on chips in the near future will require advances in packaging technology in order to connect such chips to other circuitry. In particular, integrated circuits that employ solder bumps and so-called "flip-chip" circuits comprise an array of contact pads on the active side of the chip that must be connected to other circuits. Typically, solder connections are formed between the contact pads on the integrated circuit and conductive elements on a carrier or package. The conductive elements on the carrier couple each contact pad to a selected site in the carrier structure. The purpose of the carrier is to make a transition from the very high density (and correspondingly small dimensions) of the chip contact pads to an arrangement of carrier contacts at a lower density. The carrier contacts may take the form of a ball grid array (BGA), which is well known in the art. The carrier can then be connected to a printed circuit board, for example, using standard methods known in the art. The carrier must also provide for dissipation of heat from the chip, which can be a substantial engineering requirement in many applications. The planarity and thermal stability of the carrier where the flip-chip is attached thereto are also important requirements that are more difficult to satisfy as chips become smaller and pad densities become higher.
Some known types of carriers comprise tape ball grid array (TBGA) technology. This technique employs a flexible tape having conductive traces formed thereon. Each trace extends from a point where a chip contact pad may be connected to it, for example by wire bonding or by flip-chip techniques, to a solder ball in a ball grid array. The TBGA carrier is typically attached by an adhesive to a relatively rigid stiffener, which provides some degree of planarity to the package. The chip may be connected for physical support to the tape or to the stiffener. The stiffener is often placed in contact with or near the chip in order to aid in removing heat from the chip. For wire bonding applications, a window may be formed in the center of the carrier tape, and the chip may reside within the window, such that the bond pads on the chip (which are typically around the edge of the chip in wire bond applications) are as close as possible to the conductive traces to which they are to be connected. U.S. Pat. No. 5,663,530 (incorporated herein by reference) describes a wire bond TBGA package in further detail. The invention of the '530 patent employs an insulating adhesive to insulate the conductive traces on a flexible circuit from a conductive stiffener when the traces are on the same side of the flexible circuit as the stiffener.
In some prior art flip-chip attachment processes, anisotropic adhesives have been employed. An example of such an adhesive is presented in U.S. Pat. 5,686,703 (incorporated herein by reference).
U.S. Pat. No. 5,583,378 (incorporated herein by reference) describes both wire bond and flip-chip BGA arrangements in detail. In the flip-chip arrangements disclosed in the '378 patent, as illustrated in FIG. 1 of this specification, stiffener 20 is attached by a layer of adhesive 22 to one side of a flexible tape 24, and conductive traces 26, contact pads 28, and solder balls 30 are on the opposite side of tape 24 from stiffener 20. Integrated circuit chip 32 is attached to carrier contact pads 28 using flip-chip techniques, wherein a solder connection 34 is formed between carrier pads 28 and chip pads 36. Chip 32 may be positioned close enough to stiffener 28 for the stiffener to act as a heat sink in some applications, even though layers of insulating tape, adhesive and encapsulant may separate the chip from the stiffener.
A problem with this and other prior art flip-chip TBGA arrangements is that the chip 32 is necessarily on the same side of the tape (and of stiffener 20) as are the BGA balls 30, such that chip 32 is sandwiched between the carrier and the printed circuit board (PCB) when it is installed, thus precluding access to the chip for additional heat sinking if it is needed. This approach also requires the application of a high density, high precision solder mask in the area of the flip-chip attachment, which is a difficult and costly processing step. Finally, as tolerances shrink with chip size and chip interconnect density, it has become difficult to form flip-chip attachment contacts 28 on the carrier with adequate planarity. It will be recognized that if even one contact pad is sufficiently out of plane it can cause improper attachment and failure of the packaged device.